--==========================================================
-- Design units : Last (Entity, Architecture, Configuration)
--
-- File name    : MinMax_LastValue.vhd
--
-- Purpose      : Storage of last data input to MinMax-Circuit
--
-- Limitations  : -
--
-- Library      : IEEE
--
-- Dependencies : ELEMpack
--
-- Author       : Claus-Juergen Thomas, REFT
--
-- Simulator    : Synopsys V3.1a on SUN SPARCstation 10
--
-----------------------------------------------------------
-- Revision list
-- Version Author Date           Changes
--
--  v1.0   cjt    13.12.95       new 
--=========================================================

LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE work.ELEMpack.all;
USE work.MinMaxPack.all;

ENTITY Last IS
  GENERIC(M: positive := 4);
  PORT(DataIn     : IN std_logic_vector(M-1 DOWNTO 0);
       Enable     : IN std_logic;
       Clk        : IN std_logic;
       LastOut    : OUT std_logic_vector(M-1 DOWNTO 0));
END Last;

--===========================ARCHITECTURE=================

ARCHITECTURE Structure OF Last IS

  SIGNAL MuxOut,LastInternal : std_logic_vector(M-1 DOWNTO 0);

  BEGIN

    Multiplexer: nMUX
      GENERIC MAP(M)
      PORT MAP(LastInternal,    -- Internal Feedback
               DataIn,          -- New Value
               Enable,
               MuxOut);

    n_Register: nREG
      GENERIC MAP(M)
      PORT MAP(Clk,
               Enable,
               MuxOut,
               LastInternal);   -- Internal Feedback

LastOut <= LastInternal;

END Structure;

--===========================CONFIGURATION=================
CONFIGURATION Last_Config OF Last IS

  FOR Structure

    FOR Multiplexer: nMUX
      USE ENTITY work.nMUX(Structure);
    END FOR;

    FOR n_Register: nREG
      USE ENTITY work.nREG(Structure);
    END FOR;

  END FOR;

END Last_Config;