The ERC32 Hard Real-Time toolset has been specifically developed to provide integrated support for the development, analysis and simulation of ERC32 embedded (hard) real-time (HRT) Ada application. The ERC32 toolset, which supports multi-windowed GUI, is hosted on Sun/Solaris 2.X platforms and is comprised of:ERC32 Ada Cross Compiler System based on Alsys SPARC technology and inclusive of:
- Ada Compiler, which generates code conforming to SPARC ISA v7;
- Ada Binder, which is used to build the application program;
- Ada Program Library Manager, which is the standard Alsys multi-library management system;
- Ada Debugger, which supports both traditional source and assembler level symbolic debug capability and general program viewing functionality;
- Ada Workbench, which supplies general-purpose tools for automatic recompilation, Ada-level cross-referencing, and automatic source code reformatting.
- Automated Worst-Case Execution Time (WCET) extractor for the generation of worst-case timing profiles of application components. (This capability is fully built-in the compilation system and is activated via suitable use of compilation switches.)
HRT Analysis Support Tools including:
- The ERC32 Ada Cross Compiler System also provides full support for the ATAC (Ada Tasking Coprocessor).
ERC32 Simulator, which supports time-representative (less than 1% discrepancy) simulation of the complete ERC32 chipset including IU, FPU, MEC, ATAC, associated memory and I/O. The ERC32 Simulator may be operated in stand-alone mode or accessed via the Ada Debugger.
- Schedulability Analyser, which supports off-line determination of the response time of every individual application activity and verification of the associated timing constraints;
- Scheduler Simulator, which supports off-line determination of the expected sequence of scheduling events at run-time and the anticipated processor utilisation for a given application.
Although the ERC32 Ada Cross Compiler System can support virtually any programming style, the ERC32 toolset assumes a programming model based upon Deadline Monotonic Scheduling, Priority-Based Pre-emptive Scheduling and Priority Ceiling Emulation. This is aimed at ensuring the implementation of interactions and the construction of predictable and statically analysable applications. The model explicitly supports cyclic and sporadic processes, the concept of hard- and soft-deadline, non-critical components, and protected objects as controlled means for data-oriented synchronisation.
User Documentation:
More information about the combined utilisation of the Alsys Ada Cross Compiler System and the associated HRT Toolset can be found in the following documents:
"Tool Support for the Construction of Statically Analysable Hard Real-Time Ada Systems" (technical report describing the rationale for the construction and utilisation of the ERC32 HRT software toolset; by T. Vardanega, ESTEC/WSD) ( postscript )
"ERC32 Software Development Toolset User Manual", (user's manual for the ERC32 commercial software toolset produced by Logica UK Ltd as part of the ERC32 development project) ( postscript )
"Worst-Case Execution Time Processing - Preliminary User's Guide", (user's guide for the WCET extraction capability embedded in the ERC32 Alsys Ada Compilation System) ( postscript )
For further information on the ERC32 Hard Real-Time toolset, please, contact: Tullio Vardanega at ESTEC/WSD (x.5331).
Last edited 11 January 1999
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