TILOS Algorithm (1985, Fishburn & Dunlop)
Actually applied to transistor sizing originally, but can also be applied to gate sizing.
Assume first gate size is fixed (usually an input pad). N gates in string, set all gates to minimum size (1X). i = N-1; Loop: cgate = i; sgate = i-1 cdelay = Compute_Delay(A to B) increase cgate size by 1; d1 = Compute_Delay(A to B); reset csize to previous increase sgate size by 1; d2 = Compute_Delay(A to B);reset csize to previous if (d1 < cdelay and d1 < d2) cgate_size = cgate_size +1; goto Loop if (d2 < cdelay and d2 < d1) sgate_size = sgate_size+1; goto Loop no further improvement possible so i = i +1, go to loop and repeat until all gates sized.