Invalidation Counters
The problem with the following example is that the memory accesses are non-atomic
- The effects of the invalidation event for the “P1: store A’ operation is observed at different times within the system.
To solve this problem, will have to have acknowledgement messages for the invalidation operation.
- Keep a counter whose initial value is the number of processors which the invalidation message went to.
- Decrement the counter for each invalidation acknowledgement. When counter reaches zero, allow other accesses to shared location.