Wisconsin Multicube (1988)
Cache Operation
Cache Operation (again)
Memory Consistency
A Problem
Invalidation Counters
Stanford DASH (Fig 18.43,18.44)
Directory Management
Read Operation
Write Operation
Sequential Consistency and Memory
Definition of Sequential Consistency
Processor Consistency
Weaker Consistency Models
Weak Consistency vs Release Consistency
Email: reese@erc.msstate.edu
Home Page: http://www.erc.msstate.edu/~reese
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