More Guesses…..
Two 4MB texture memories, assume 64 bit datapaths to each
- 64 bit framepath + 64 bit texture path * 2 => 192 bits!!!
Current EDO DRAM chips are 16Mb.
- 12MB = 96Mb
- 96Mb/16Mb = 6 chips to meet storage spec
Widest 16Mb EDO DRAM is 16 bits (1M x 16)
- 192/16 => 12 chips to meet bus width spec
So must be using at least 12 chips as one bank
- Right or Wrong? Call this guess #1.