Lab1: CMOS Inverter and HSPICE Intro


Introduction

The purpose of this lab is to introduce the student to the CMOS inverter via an HSPICE simulation. You should be able to finish this lab in the 3 hour time period. It also serves as an initial checkpoint to make sure your VLSI workstaion account is setup correctly.

Setup

  1. Read the HTML HSPICE/MWAVES tutorial and modify your environment so that you can run HSPICE and MWAVES.
  2. Make a directory called 'lab1', and copy all files from ~reese/EE4253/lab1 into it.

Part 1 - DC Analysis of a CMOS inverter

One of the files you copied is called 'inverter_dc.sp'. This file does a DC analysis on a CMOS inverter and measures the switching point.

  1. Run the simulation using hspice and observe the measured results. Use MWAVES to produce a plot the input voltage versus the output voltage.
  2. The initial VDD value is 5 volts; add '.alter' statements to the spice file so that we can measure the switching point for VDD values of 4.0, 3.0, and 2.0 volts. You do not need plots of these results; just the measured values.

Part 2 - AC Analysis of a CMOS inverter

One of the files you copied is called 'inverter_ac.sp'. This file does an AC analysis on a CMOS inverter and measures the high-to-low propagation delay.

  1. Run the simulation using hspice and observe the measured results. Use MWAVES to produce a single plot which shows the input waveform versus time, and the output waveform versus time.
  2. Edit the spice file so that the low-to-high propagation delay is measured. This measurement value should be called 'tplh'. You will need to edit the input PWL source so that it produces a falling input waveform. You will also need to edit the .measure statement.
  3. The initial VDD value is 5 volts; add '.alter' statements to the spice file so that we can measure 'tplh' for VDD values of 4.0, 3.0, and 2.0 volts. You do not need plots of these results; just the measured values.
  4. The initial Cload value is 15 fF; add '.alter' statements to the spice file so that we can measure 'tplh' for Cload values of 60fF and 150fF for a VDD value of 5 v. You do not need plots of these results; just the measured values.

To Turn In

  • Two plots, one for the DC analysis and one for the AC analysis as mentioned above.
  • All measured results; please put these in ONE file and CLEARLY mark what they are.
  • Answer the following questions:
    1. a. In the DC analysis, what is the trend of the switching point as a percentage of VDD as the voltage is scaled down. Would you say it stays 'mostly the same', 'steadily & significantly decreasing', or 'steadily & significantly increasing'?
    2. a. In the AC analysis, what is the trend of the propagation delay as the voltage is scaled down? Why does this happend? What is the trend of the propagation delay as the output capacitive load is scaled up? Why does this happen?