Perhaps the most useful outcome of the project is the side-effect that the Bullwinkle architecture is extremely general-purpose. It has already been used as a platform for testing prototype FPGA designs, namely the Fast Circle Generator, xcircle. What makes Bullwinkle so useful as a prototype board is that the FPGA is programmed via the PC bus instead of by EPROM (which must be burned) or by a cable; also, the Natasha interface to SRAM is incredibly simple and provides a 64 kilobyte workspace for any FPGA design. The only limitation is that reads and writes can not be quickly intermixed; a port write is needed to place the board in write mode or in read mode. Since port writes are inherently slow, full-speed memory access to the FPGA is only available for strings of reads or strings of writes. (Actually, Bullwinkle goes from write mode to read mode without a port write if the FPGA raises the Full signal.)
To use Bullwinkle for a general FPGA design, one should use the pad-placements indicated in the boris.cst file (Appendix G.1). Read or write mode is established by the FPGA input ``Extract,'' and read or write actions should take place on the falling edge of ``Trigger.'' Status information that needs to be polled by I/O port reads should be placed on the ``Empty'' or ``Init'' pads.