The goal of rapid prototyping would be lost if you had to design and construct your own circuit board for your FPGAs. Luckily, you can have your design downloaded and tested in mere minutes thanks to the GERM board.
The simplest configuration (restricting I/O use to roughly one quarter of the available pads) is to connect a "Yugo" version of the GERM board to a card-edge connector for the gray box interfaces in the EE lab room (02G Hudson). The gray box provides power, adjustable clock signal, plus random and 4 bit counter inputs, and connects your outputs to the HP logic analyzer for display. You configure the FPGA from your bit file via a cable from a PC to a header on the GERM. This is an excellent way to quickly verify sections of your design, if not all of it. The LFSR Counter sample project targets the GERM.
A second option is to use the BORG add-in card for PCs. This four-FPGA board includes on-board dual-port SRAM, LEDs and seven-segment displays, plus some prototype space for you to add external components. Additional tools are necessary to coordinate pin assignments between the four FPGAs. Refer to the files in /opt/digital/share/documentation/BORG2 for details.
Finally, you can build your own host circuit for the FPGA. Your circuit must provide power and clock, and will need support logic such as a GAL to coordinate configuration of the FPGA at power-up. The configuration information can come for either an on-board EPROM, a cable such as that used by the GERM, or from a serial or parallel data stream such as a PC bus. What method you use will be largely dependent on what your intended application is. For example, are you making a standalone controller or a PC add-in card peripheral/coprocessor? Do you intend to change configurations often or will a more-or-less permanent EPROM be sufficient?
Whatever target architecture your project requires, it is probably a good idea to become familiar with it by creating small, easily testable circuits and building up to the full project. For example, you could create a simple counter circuit using Viewdraw, then recreate the same circuit using VHDL, then add functionality to your VHDL incrementally.
The Address Tracing System sample project demonstrates the design and implementation of a custom FPGA circuit featuring four FPGAs programmed with the same bitstream in parallel from a PC bus. This technique requires that your host software know how to write the contents of the bit file to the I/O port or memory address through which your card communicates with the PC.