Data Modeling

Introduction

Data models can be created to provide both very high level models at the specification and documentation level, and low levels models that allow design and analysis below the gate level.
high level abstraction
low level, detailed modeling

A data TYPE consists of both values and operators. In this section we consider first how to construct a TYPE, and then how to form the operators on and between types.

 Values

 We define the values that objects of a TYPE can take on in the following ways:

We create more complex, composite data structures as combinations of In addition we have information about the data structures themselves (as well as objects, and design bodies) stored as Then we see how to form constant values for these structures, no matter how complex they become: Operators Packages are used to

Data Abstraction

Types (a set of values)
Operations
Derived types and operations
Operations between types

Primitive Scalar Data Types
(included in Package STD.STANDARD)

These arise naturally in most problem domains

integer
real
boolean
char
--especially useful in modeling physical systems
time
-- especially useful in modeling digital systems
bit
Especially Useful Derived Data Types
(also in Package STD.STANDARD)
string (array of character)
bit_vector (array of bit)
natural ( subrange of integers)
positive ( subrange of integers )  

Packages

Package Declarations

Package Bodies

Data Abstraction Examples

Useful both in high level description and low level, detailed modelling High level example:

Package Traffic_Package is

type color is (green, yellow, red, unknown);

function next_color ( x : color )
return color;
end Traffic_Package; Low level example:

Package Multi_valued_logic is

type MVL is ( '0', '1', 'X', 'Z' );

function "and" ( a, b : MVL) return MVL;
function "or" ( a, b : MVL) return MVL;
function "not" ( a : MVL) return MVL;
function "nand" ( a, b : MVL) return MVL;
function "nor" ( a, b : MVL) return MVL;
function "xor" ( a, b : MVL) return MVL;

type MVL_vector is
array ( integer range <> ) of MVL;

end Multi_valued_logic;

IEEE Standard 1164

Industry standard logic system supporting 3, 4, 9 valued logic systems

PACKAGE std_logic_1164

TYPE std_ulogic IS

( 'U', -- uninitialized
'X', -- forcing unknown
'0', -- forcing 0
'1', -- forcing 1
'Z', -- high impedance
'W', -- weak unknown
'L', -- weak low (0)
'H', -- weak high (1)
'-' -- don't care
);

It also includes declarations for

  • functions AND, OR, NAND, NOR, XOR, XNOR, NOT for both bit logic, and vectors
  • Conversion functions to bit, and subtypes UX01, X01, X01Z

    • User Defined Functions

    Creating functions to work on a particular kind of data object, or to convert between types of data is so routine that it frequently is not viewed as part of providing data abstraction.

    With some care and planning, in any package of data type declarations there a well-conceived set of functions will also be declared to provide the useful operations on objects of that data type. The implementation of those functions should appear in the corresponding function body.

    Classes of Data Types

    Enumerated Types

    Based on Character

    Example:
     

    type Strength_value is
    (   'Z', -- resistive,
        'C', -- weak,
        'D', -- normal (drive),
        '$' -- dominant (as in power supply)
    );
    Note: By using enumeration on subsets of characters it is possible to print the values of these enumerated objects. For example, from the bidirectional register example above, bits are :
    report s & "values on s1,s0 inputs illegal.";

    User-defined Names

    type color is (green, yellow, red, unknown);

    Note: By using user-defined names (without quotes) we drop the restriction of one-character values, but we can no longer print them directly.

    Ranges of Base Types

    Ranges of Integers - for counting and indexing

    type byte_range is range 0 to 255;

    Ranges of Real - for measuring values within intervals -

    type RV_gen is range -1.0 to 1.0;

    Why use subranges of types?

  • Does much to add precision to a design and improve efficiency of tools and implementations.
  • Restricting the range of values for a signal may imply width of bus or register at implementation
  • For test generation, it constrains the space of values from which a test vector must be taken, or of states which may be reached.
  • Permits early checking of design consistency at the boundaries of values and arrays.
  • Provides boundaries for dynamic checking during simulation to help ensure model correctness.

    • Subtypes

    Permit the definition of types either by constraining

  • (1) the range of values of the base type, or
  • (2) by adding an index constraint to a base array type.
    • Examples of range constrained subtypes:
    subtype control_chars is character range NULL to USP ;
    subtype address_range is integer range 0 to 4095 ;
    subtype signed_byte is integer range -128 to 127 ;

    where the user defines enumerated type

    type opcodes is ( adds, addu, addl, addm, subs, subu, subl, subm . . . );

    we can create the following subtypes:

    subtype addops is opcodes range adds to addm;
    subtype subops is opcodes range subs to subm;

    Example of index constrained subtypes:

    subtype byte_reg is bit_vector (0 to 7);

    Physical Data Types

    Physical -- measured in terms of defined units

    Values are computed using integer values and operating, but meaning is extended by specifying the unit of measure, as well.

    Example from predefined types:
     

    type TIME is range  - (2**63 -1) to (2**63 -1)
    units fs ;            -- base unit femtosecond
    ps  = 1000 fs   -- picosecond
    ns  = 1000 ps   -- nanosecond
    us  = 1000 ns   -- microsecond
    ms  = 1000 us   -- millisecond
    sec  = 1000 ms  -- second
    hr  = 60 min    -- hour
    end units;
    Note: All practical implementations of simulators have found it necessary to provide range - (2**63 -1) to (2**63 -1).

    Other physical types frequently defined by users for computing timing are

  • Resistance -- base unit ohms
  • Capacitance -- base unit picofarads (pf)
  • Length -- base unit microns
    • Making the Units Correspond
    VHDL helps in writing formulas using physical units.
  • Addition and subtraction must be between operands of the same type, and the result is of that type. Units will be automatically "converted" to be the same. (Actually, all computations are performed in the base type.)
  • Multiplication or division of a physical type by an integer or real produces a result of the same type.
  • Division of a physical type by the same physical type results in an integer value.
  • Relational operations must be between operands of the same physical type.
  • VHDL helps protect against bad formula writing by enforcing the rules.
    • Example: Trq := Tcq + Tq * (q_cap / pF);

    where Trq, Tcq, and Tq are time; q_cap is of physical type capacitance in pF.

    Composing Complex Data Types

    Three mechanisms for composition

  • Array -- indexed, ordered collection of elements of a certain type
  • Record of -- collection of elements of different types and use
  • Access -- pointer to elements of a type

    • Arrays

    Unconstrained Arrays

    Form:

    How are Arrays Constrained?

    Records

    Examples of Record Use

    Access (Pointers)

    Predefined Attributes

    Attributes with constant values

    left, right, low, high,
    range, length, reverse_range

    Generalizing Models