-- Copyright © 1993 by McGraw-Hill, Inc. and Zainalabedin Navabi
-- FIGURE 8.17
-- ENTITY DECLERATION OF SEQUENCE DETECTOR :
ENTITY moore_detector IS
PORT (x, clk : IN BIT; z : OUT BIT);
END moore_detector;
--
-- VHDL BEHAVIORAL DESCRIPTION FOR THE 1011 SEQUENCE DETECTOR IN FIG 8.16:
ARCHITECTURE behavioral_state_machine OF moore_detector IS
TYPE state IS (reset, got1, got10, got101, got1011);
SIGNAL current : state := reset;
BEGIN
PROCESS
BEGIN
CASE current IS
WHEN reset =>
WAIT UNTIL clk = '1';
IF x = '1' THEN current <= got1;
ELSE current <= reset;
END IF;
WHEN got1 =>
WAIT UNTIL clk = '1';
IF x = '0' THEN current <= got10;
ELSE current <= got1;
END IF;
WHEN got10 =>
WAIT UNTIL clk = '1';
IF x = '1' THEN current <= got101;
ELSE current <= reset;
END IF;
WHEN got101 =>
WAIT UNTIL clk = '1';
IF x = '1' THEN current <= got1011;
ELSE current <= got10;
END IF;
WHEN got1011 =>
z <= '1';
WAIT UNTIL clk = '1';
IF x = '1' THEN current <= got1;
ELSE current <= got10;
END IF;
END CASE;
WAIT FOR 1 NS;
z <= '0';
END PROCESS;
END behavioral_state_machine;
--