/* * Radix-512 Divider Benchmark * * C-program to generate a VHDL file, suitable for Synopsys simulator, * from a configuration file (see make_tv.doc), to test the functionality * of the Radix-512 divider benchmark. * * Alberto Nannarelli e-mail: alberto@ece.uci.edu * University of California, Irvine * * April 8, 1994 * */ #include #include #include #define N 16 double makedouble(); main(argc,argv) int argc; char *argv[]; { FILE *fd; char string[1000]; int i,j,k; double d; double x; double q; float dec_x,dec_d; char bin_x[53],bin_d[53]; int start=0; int delay=10; if ( argc != 2) { fprintf(stderr,"\n Check input parameters : make_tv \n\n"); exit(1); } if((fd = fopen (argv[1],"r")) == NULL) { fprintf(stderr,"\n %s : FILE NOT FOUND \n\n",argv[1]); exit(2); } i=0; for (;;) /* Forever */ { /* Make string look empty. */ string[0] = '\0'; /* Read next line in file. */ fgets (string, 1000, fd); /* Break if end of file. */ if (feof (fd)) { break; } /* Find short lines, ie just a newline, and lines * beginning with '-' . Treat them as comments. */ if (string[0] == '\n' || string[0] == '-') { continue; } if (sscanf (string, "delay %d",&delay) == 1) { if (1 == start) fprintf(stderr," WARNING simulation delay set to default value\n"); else fprintf(stderr,"read simulation_delay = %d ns\n",delay); continue; } if ( !strncmp (string, "start", 5)) { start = 1; writeHead(delay,argv[1]); continue; } if ( !strncmp (string, "end", 3)) { start = 0; writeTail(); continue; } if (sscanf (string, "dec %f %f",&dec_x,&dec_d) == 2) { if (0 == start) { fprintf(stderr," ERROR file not started\n\n"); exit(1); } fprintf(stderr,"vector %d -> ",++i); fprintf(stderr,"read x = %f, d = %f\n",dec_x,dec_d); x=(double)dec_x; d=(double)dec_d; if ( 0 == readDec(x,d,&q) ) writeVector(x,d,q,i); else fprintf(stderr," vector discarted\n"); continue; } if (sscanf (string, "bin %s %s",bin_x,bin_d) == 2) { if (0 == start) { fprintf(stderr," ERROR file not started\n\n"); exit(1); } fprintf(stderr,"vector %d -> ",++i); if ( 0 == readBin(bin_x,bin_d,&x,&d,&q) ) writeVector(x,d,q,i); else fprintf(stderr," vector discarted\n"); continue; } } /* for (;;) */ fclose (fd); if (1 == start) fprintf(stderr," NOT hit end of file!\n"); else fprintf(stderr," Done.\n"); } /* ============ F U N C T I O N S =============================== */ writeHead(delay,name) int delay; char *name; { FILE *stream; char line[256]; char dummy[16],month[16],day[16],hour[16],year[16]; stream = popen("date", "r"); fgets(line, 256, stream); sscanf(line,"%s %s %s %s %s %s",dummy,month,day,hour,dummy,year); pclose(stream); fprintf(stderr,"date : %s %s, %s time : %s\n",month,day,year,hour); printf("---------------------------------------------------------------------------\n"); printf("--\n"); printf("-- Radix-512 Divider Benchmark\n"); printf("--\n"); printf("-- Test Vectors\n"); printf("--\n"); printf("-- VHDL file generated by make_tv from %s\n",name); printf("-- date : %s %s, %s time : %s\n",month,day,year,hour); printf("--\n"); printf("---------------------------------------------------------------------------\n\n"); printf("Library IEEE;\n"); printf("use IEEE.std_logic_1164.all;\n"); printf("use IEEE.std_logic_arith.all;\n"); printf("use IEEE.std_logic_unsigned.all;\n\n"); printf("Entity E is\n"); printf(" generic( simulation_delay : time := %d ns ;\n",delay); printf(" division_delay : time := %d ns );\n",delay*7); printf("end;\n\n"); printf("architecture A of E is\n"); printf(" component radix512\n"); printf(" port( x,d: in std_logic_vector (52 downto 0);\n"); printf(" q: out std_logic_vector (52 downto 0));\n"); printf(" end component;\n\n"); printf("signal x,d: std_logic_vector(52 downto 0);\n"); printf("signal q: std_logic_vector(52 downto 0);\n\n"); printf("for all : radix512 use entity work.radix512(radix512) ;\n\n"); printf("begin\n"); printf(" INST1 : radix512 port map( x, d, q );\n\n"); printf("process\n\n"); printf("begin\n\n"); printf(" wait for simulation_delay ;\n\n"); printf("---------------------------------------------------------------------------\n"); printf("-- TEST VECTORS \n"); } writeTail() { printf("---------------------------------------------------------------------------\n"); printf("\nend process;\nend;\n"); } readDec(x,d,q) double x,d,*q; { if ((x >= 1) || (x < .25)) { fprintf(stderr," ERROR *** x out of range\n"); return(1); } if ((d >= 1) || (d < .5)) { fprintf(stderr," ERROR *** d out of range\n"); return(1); } if ( x >= d ) { fprintf(stderr," ERROR *** x greater than d\n"); return(1); } *q=x/d; return(0); } readBin(in1,in2,x,d,q) double *x,*d,*q; { if ( strlen(in1) > 53 ) { fprintf(stderr," ERROR *** too many bits \n"); return(1); } *x = makedouble(in1); fprintf(stderr,"read x = %f, ",*x); if ( strlen(in2) > 53 ) { fprintf(stderr,"\n ERROR *** too many bits \n"); return(1); } *d = makedouble(in2); fprintf(stderr,"d = %f\n",*d); if ((*x >= 1) || (*x < .25)) { fprintf(stderr," ERROR *** x out of range\n"); return(1); } if ((*d >= 1) || (*d < .5)) { fprintf(stderr," ERROR *** d out of range\n"); return(1); } if ( *x >= *d ) { fprintf(stderr," ERROR *** x greater than d\n"); return(1); } *q=(*x)/(*d); return(0); } writeVector(x,d,q,i) double x,d,q; int i; { printf("---------------------------------------------------------------------------\n"); printf("-- x = %54.53f\n",x); printf("-- d = %54.53f\n",d); printf("-- q = %54.53f\n\n",q); printf(" x <= \""); printbin3(x,54); printf("\" ;\n\n"); printf(" d <= \""); printbin3(d,54); printf("\" ;\n\n"); printf(" wait for division_delay;\n assert q = \""); printbin3(q,54); printf("\"\n"); printf(" report \"q does not match in pattern %d\"\n\tseverity error;\n\n",i); } printbin3(num,n) double num; int n; { int i,j; double old,div; j = 1; old = num; for (i=1 ; i= 1) { printf("1"); old = old-div; } else { printf("0"); } } return; } double makedouble(in) char *in ; { int i,j; double old,div; div = 0; for (i=0 ; i<53; i++) { if ( in[i] == '1' ) { div += pow(2.0,(double)(-(i+1))); } } return div; }