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--
--   Intel 8251 Benchmark
--
-- Source:  Intel Data Book
--
-- VHDL Benchmark author Indraneel Ghosh
--                       University Of California, Irvine, CA 92717
--                 
-- Developed on April 7, 92
--
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 THIS DIRECTORY HAS THE FOLLOWING FILES :

 rx.vhd     : Model of the "receiver" process in the VHDL model of 8251
	      USART

 vectors    : VHDL test vectors directory for the "receiver" process

 test_vectors_rx.doc  : Documentation for the test vectors. Contains description of
               		testing strategy.

 cmd_rx.inc : Simulation command file for "receiver" process test vectors.

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 PROCEDURE FOR SIMULATING THE TEST VECTORS FILE :


 (1) Compile the MVL7 data types file :
				          zvan types.vhd

 (2) Compile the VHDL data types file :
				          zvan synthesis_types.vhd

 (3) Compile the VHDL data functions file :
				             zvan MVL7_functions.vhd

 (4) Compile the VHDL model file of the 8251 USART:
				       		    zvan rx.vhd

 (5) Compile the test vector file :
		     		    zvan rx_async_1x.vhd

 (6) Simulate the test vectors :
				 zvsim -t ns -i cmd_rx.inc E

     The simulation output appears in a file called "run.out".
     Any simulation errors (outputs not matching expected values) are shown
     by "Assert" statements in the file "run.out".