--------------------------------------------------------------------------
--------------------------------------------------------------------------
--	File Name 	: ellip.v
--	Author(s)	: Rajiv Dutta
--	Affiliation	: Laboratory for Digital Design Environments
--			  Department of Electrical & Computer Engineering
--			  University of Cincinnati
--	Date Created	: September 1991.
--	Introduction	: Behavioral description of the Elliptic Wave
--			  Filter, written in a synthesizable subset of
--			  VHDL.
--	Source		: P. Paulin and many others used this example
--                        in their papers. Was a benchmark at the
--                        Highlevel Synthesis Workshops.
--
--	Disclaimer	: This comes with absolutely no guarantees of any
--			  kind (just stating the obvious ...)
--
--      Acknowledgement : The Distributed Synthesis Systems research at 
--                        the Laboratory for Digital Design Environments,
--                        University of Cincinnati, is sponsored in part 
--                        by the Defense Advanced Research Projects Agency 
--                        under order number 7056 monitored by the Federal 
--                        Bureau of Investigation under contract number 
--                        J-FBI-89-094.
--
--------------------------------------------------------------------------
--------------------------------------------------------------------------
Use Work.functions.all;

entity elliptic is
   port(inp,sv2,sv13,sv18,sv26,sv33,sv38,sv39 : inout bit_vector(15 downto 0);
        over : out bit);
end elliptic;

architecture elliptic of elliptic is

begin

  P1: process
    variable  outpi, sv18i, sv38i : bit_vector(15 downto 0);
    variable rega, regb, regc, regd, rege,regf, regg, regh : integer := 2;
    variable op3, op32, op12, op20, op25, op21, op24 : bit_vector(15 downto 0);
    variable op19, op27, op11, op22,op29, op9, op30 : bit_vector(15 downto 0);
    variable op8, op31, op7, op10, op28, op41, op6 : bit_vector(15 downto 0);
    variable op15, op35, op40, op4, op16, op36 : bit_vector(15 downto 0);

	-- instruction.Execution
      begin
		op3 := inp + sv2;
		op32 := sv33 + sv39;
		op12 := op3 + sv13;
		op20 := op12 + sv26;
		op25 := op20 + op32;
		op21 := op25 * 2;
		op24 := op25 * 2;
		op19 := op12 + op21;
		op27 := op24 + op32;
		op11 := op12 + op19;
		op22 := op19 + op25;
		op29 := op27 + op32;
		op9 := op11 * 2;
		sv26 <= op22 + op27;
		op30 := op29 * 2;
		op8 := op3 + op9;
		op31 := op30 + sv39;
		op7 := op3 + op8;
		op10 := op8 + op19;
		op28 := op27 + op31;
		op41 := op31 + sv39;
		op6 := op7 * 2;
		op15 := op10 + sv18;
		op35 := sv38 + op28;
		outpi := op41 * 2; 
		op4 := inp + op6;
		op16 := op15 * 2;
		op36 := op35 * 2;
		sv39 <= op31 + outpi; 
		sv2 <= op4 + op8;
		sv18i := op16 + sv18;
		sv18 <= sv18i;
		sv38i := sv38 + op36;
		sv38 <= sv38i;
		sv13 <= op15 + sv18i;
		sv33 <= sv38i + op35;
	over <= '1';
	wait on inp;
     end process;

end elliptic;