SOPC World Korea 2004 발표자료 Download

행사가 종료되었습니다...

지난 10월 27일 (수) 삼성동 그랜드 인터콘티넨탈 그랜드 볼룸에서 열렸던 "SOPC World Korea 2004"에서 발표되었던 여러 Presentation 자료들을 다운로드 받으실 수 있습니다...

문의 사항이나 의문점이 있으면 ALTERA Korea나 해당 대리점으로 연락하시기 바랍니다...

**Altera Track** (그랜드 볼룸I)
Time	Topic
08:30 ~ 09:00	Registration
09:00 ~ 09:20	Opening Ceremony, Welcome Speech, Exhibition opens
09:20 ~ 10:00	Keynote Speech / Guest Speech
10:10 ~ 11:10	Ensuring Success in High Speed System Designs
11:20 ~ 12:20	Accelerating System Level Integration Multi-Processor Systems in FPGAs: Implementation and debug
13:50 ~ 14:50	Increase System Performance and Efficiency Using Distributed Direct Memory Access (DMA)
14:55 ~ 15:55	MegaMACs to TeraMACs: Implementing Digital Signal Processing in FPGAs
16:00 ~ 16:45	Altera Roadmap

**Partner Track** (그랜드 볼룸III)
Time	Topic
10:10 ~ 10:40	Solid Technologies presentation
10:40 ~ 11:10	Sysfo presentation
11:20 ~ 11:50	Synplicity presentation
11:50 ~ 12:20	Mentor Graphics presentation
13:10 ~ 13:40	TelASIC presentation
14:00 ~ 14:30	Aldec presentation
14:40 ~ 15:10	Synopsys presentation
15:20 ~ 15:50	MathWorks presentation
16:00 ~ 16:45	Altera Roadmap

**Technical Application Seminar A - Device** (그랜드 볼룸II)
Time	Topic
10:10 ~ 10:40	Power & Thermal Management in Stratix II
10:50 ~ 11:20	HardCopy Structured ASIC
11:30 ~ 12:00	Implement DDR Interface in Cyclone and Stratix
13:10 ~ 13:40	MAX II (How to use User Flash Memory)
14:00 ~ 14:30	Open Base Station Architecture Initiative (OBSAI)
14:40 ~ 15:10	Power & Thermal Management in Stratix II
15:20 ~ 15:50	HardCopy Structured ASIC
16:00 ~ 16:30	Implement DDR Interface in Cyclone and Stratix

**Technical Application Seminar B - Tool** (그랜드 볼룸II)
Time	Topic
10:10 ~ 10:40	Nios® II (µC/OS2 Porting with Nios II)
10:50 ~ 11:20	Formal Verification
11:30 ~ 12:00	Advanced Systhesis : Mux Optimization
13:10 ~ 13:40	Using the RTL Viewer in Quartus II
14:00 ~ 14:30	Chip Editir
14:40 ~ 15:10	Nios® II (µC/OS2 Porting with Nios II)
15:20 ~ 15:50	Formal Verification
16:00 ~ 16:30	Advanced Systhesis : Mux Optimization

**Altera Demos** 그랜드 볼룸II 전시공간, 각각의 Booth에서는 다음과 같은 Demo가 진행되었습니다...
Speed Image-Processing Design with DSP Builder (Stratix II) High-Speed Filtering Design with DSP Builder (Stratix II) MAX II Development Kit Demonstrations High-Performance 533-Mbps DDR2 SDRAM Interface (Stratix II) Stratix® GX Gigabit Transceiver's Signal Integrity Enhancing Features Stratix II LVDS Eye Diagram at 1 Gbps Nios II Multi-Processor VGA Demo (Stratix) Nios II Web Server Demo (Cyclone)