Verilog HDL

Compiler Directives


Quartus® II support for compiler directives is described below. Section numbers match those in the IEEE Std 1364-1995 IEEE Hardware Description Language Based on the Verilog Hardware Description Language manual.

Section Verilog HDL Construct Quartus II Support     Note (1)
16.1 `celldefine and `endcelldefine Not supported.
16.2 `default_nettype Not supported.
16.3 `define and `undef Supported.
16.4 `ifdef, `else, and `endif Supported.
16.5 `include Supported.
16.6 `resetall Not supported.
16.7 `timescale Not supported.
16.8 `unconnected_drive and `nounconnected_drive Not supported.


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