A feature of logic cells in ACEX^® 1K, APEX^™ 20K, APEX^™ II, ARM^®-based Excalibur^™, FLEX 10KE, Mercury^™, Stratix^™, and Stratix^™ GX devices that allows either one of the following configurations:

• Two logic functions—a combinatorial logic function and a register with a single data input—implemented in the same logic cell.

• A logic function that feeds a register and other cells, implemented in the same logic cell as the register that it feeds.

You can implement the Auto Packed Registers logic option, which allows the Compiler to automatically implement register packing for appropriate pairs of logic functions, with either the Default Logic Option Settings page of the Settings dialog box (Assignments menu) or the Assignment Organizer dialog box (Assignmnets menu).

You also can manually implement register packing by assigning two logic functions to the same logic cell. However, Altera^® strongly recommends that you use the Auto Packed Registers logic option to allow the Compiler to automatically implement register packing, rather than use manual logic cell assignments to implement register packing.

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