A logic option that directs the Compiler to control the number of destinations the specified node feeds so the fan-out count does not exceed the value specified as the maximum number of fan-out allowed from the node.

This option is useful for reducing the load of critical signals, which improves performance.

This option is ignored if it is applied to anything other than a register, pin, or a logic cell buffer. This option is available for APEX^™ 20K, APEX 20KC, APEX 20KE, APEX^™ II, ARM^®-based Excalibur^™, Cyclone^™, Stratix^™, and Stratix^™ GX devices.