An I/O standard used for high-speed I/O interfaces, LVDS (low-voltage differential signaling) uses differential inputs without a reference voltage. LVDS uses two wires carrying differential values to create a single channel. Two pins are required to determine the state of the signal.
The LVDS I/O standard uses a differential signal, an output (VCCIO) voltage of 3.3 V and the input/output buffers are determined by LVDS. The LVDS I/O standard is supported by the APEX 20KC, APEX 20KE, APEX II, ARM®-based Excalibur, Cyclone, Mercury, Stratix, and Stratix GX device families.
- PLDWorld - |
|
Created by chm2web html help conversion utility. |