The smallest unit of logic located in a LAB of all Altera^® devices supported by the Quartus^® II software except MAX^® 3000 and MAX 7000 devices. A logic element is also generally known as a logic cell.

In ACEX^® 1K, APEX^™ 20K, APEX^™ II, ARM^®-based Excalibur^™, FLEX^® 6000, and FLEX 10KE devices, a logic element consists of a four-input look-up table (LUT), which is a function generator that quickly computes any function of four variables; a programmable register to support sequential functions; a carry chain; and a cascade chain. In ACEX 1K, FLEX 6000, and FLEX 10KE devices, each logic element drives the local and FastTrack^® interconnect. In APEX 20K, APEX II, and ARM-based Excalibur devices, each logic element drives the local, MegaLAB^™, and FastTrack interconnect.

Each programmable register of a ACEX 1K, APEX 20K, APEX II, ARM-based Excalibur, FLEX 6000, or FLEX 10KE logic element can be configured for D, T, JK, or SR operation, or bypassed entirely for pure combinatorial logic. In ACEX 1K and FLEX 10KE devices, the register's clock, clear, and preset can be driven by global signals, general-purpose I/O pins, or any internal logic. In APEX 20K, APEX II, ARM-based Excalibur, and FLEX 6000 devices, the register's clock and clear can be driven by global signals, general-purpose I/O pins, or any internal logic.

You can assign a logic function to a specific logic element in ACEX 1K, APEX 20K, APEX II, ARM-based Excalibur, FLEX 6000, and FLEX 10KE devices. You can also assign a logic function to a larger area within a device, such as a LAB or a MegaLAB row, to make sure the function is implemented in a logic element in that particular area.

In Mercury^™ devices, a logic element consists of a four-input LUT, a programmable register, and a carry chain. Each logic element drives the local, row, priority row, column, priority column, and RapidLAB^™ interconnect, and leap lines.

Each programmable register of a Mercury logic element can be configured for D, T, JK, or SR operation, or bypassed entirely for pure combinatorial logic. The register's clock, clock enable, and clear can be driven by global signals, general-purpose I/O pins, or any internal logic.

You can assign a logic function to a specific logic element in Mercury devices. You can also assign a logic function to a larger area within a device, such as a Custom region or a LAB, to make sure the function is implemented in a logic element in that particular area.

In Cyclone^™, Stratix^™, and Stratix^™ GX devices, a logic element consists of a four-input LUT, a programmable register, and a carry chain. Cyclone, Stratix, and Stratix GX logic elements also supports a dynamic single-bit addition or subtraction mode that is selectable by a LAB-wide control signal. Each logic element drives the local, row, column, LUT chain, register chain, and direct link interconnects.

Each programmable register of a Cyclone, Stratix, and Stratix GX logic element can be configured for D, T, JK, or SR operation, or bypassed entirely for pure combinatorial logic. The register's clock, clear, clock enable, preset, asynchronous load, and asynchronous data control can be driven by general-purpose I/O pins or any internal logic. The register's clock and clear can also be driven by global signals.

You can assign a logic function to a specific logic element in Cyclone, Stratix, and Stratix GX devices. You can also assign a logic function to a Custom region to make sure the function is implemented in a logic element in that Custom region.

Logic elements have "numbers" of the following format for the following devices:

A fast input-type logic cell that is associated with an I/O pin in a MAX 7000 device, or a fast output-type logic cell on the periphery of a FLEX 6000 device, is also known as an I/O cell or I/O element.

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