A logic option that directs the Compiler to insert an additional macrocell after the output(s) of the logic function to which it is applied, provided that the function is implemented as one macrocell. This option allows you to insert macrocells for routing purposes without adding LCELL primitives to the design. If this option is applied to a mega- or macrofunction, it operates on all outputs of the function.

This option is ignored if it is applied to a logic function that is not already implemented in a macocell(s). For example, if it is applied to an AND gate, it does not force the AND gate to be the output of a macrocell. This option is available for MAX^® 3000, MAX 7000AE, and MAX 7000B devices.