Glossary

External Input Delay timing assignment


An individual or project-wide timing assignment that specifies the delay of a signal from an external register (outside the device) to the input pin. The value of this assignment usually represents the tCO of the external register feeding the data input pin the device plus the actual board delay. If you make this assignment to an individual node, you must assign it to an input or bidirectional pin.

To include external delays in timing analysis calculations, you must turn on Include external delays to and from device pins in fmax calculations in the Clocks page of the Settings dialog box (Assignments menu).

In designs that use the LVDS I/O standard, you should specify the appropriate default or individual external delay to the LVDS receiver megafunction. This external delay should equal the transmitter channel-to-channel skew (TCCS) plus any board skew.

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