An industry-standard I/O Buffer Information Specification (IBIS) file format for electronic behavioral specifications (with the extension .ibs) that is generated by the Quartus^® II software for performing board-level signal integrity verification of Altera^® devices with other EDA tools. An IBIS Output File contains IBIS models for the specific voltage, inductance, capacitance, and resistance values for the I/O pins in a specific Altera device.

You can direct the Compiler to generate an IBIS Output File after successful compilation by selecting Board-level in the EDA tools list and selecting Signal Integrity (IBIS) in the Tool name list in the EDA Tool Settings page of the Settings dialog box (Assignments menu). The Compiler places the generated IBIS Output File in the /<project directory>/board/ibis directory.

The file name of the IBIS Output File is the top-level design entity name with an .ibs extension and conforms to the IBIS version 3.2 standard. You can use the IBIS Output File for board-level simulation in the Mentor Graphics^® Interconnect Synthesis, Innoveda XTK and HyperLynx, and Cadence SPECCTRAQuest signal integrity verification tools.

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