Glossary

embedded cell (EC)


A memory element that exists in the embedded system of an APEX 20K, APEX II, ARM®-based Excalibur, or Mercury device; in the embedded array of an ACEX® 1K or FLEX 10KE device; or in the RAM of a Stratix or Stratix GX device. Embedded cells can implement RAM, ROM, FIFO, or combinatorial logic; in APEX 20KE, APEX II, ARM-based Excalibur, and Mercury devices, embedded cells can also implement content-addressable memory (CAM).

In ACEX 1K and FLEX 10KE devices, an Embedded Array Block (EAB) consists of a group of 16 embedded cells that can implement a memory block of 256 x 16, 512 x 8, 1,024 x 4, or 2,048 x 2 bits. For memory blocks of 256 x 16, 512 x 8, 1,024 x 4, or 2,048 x 2 bits, an EAB has 16, 8, 4, or 2 outputs, respectively.

In APEX 20K and ARM-based Excalibur devices, an Embedded System Block (ESB) consists of a group of 16 embedded cells that can implement a memory block of 128 × 16, 256 × 8, 512 × 4, 1,024 × 2, or 2,048 × 1 bits. For memory blocks of 128 × 16, 256 × 8, 512 × 4, 1,024 × 2, or 2,048 × 1 bits, an ESB has 16, 8, 4, 2, or 1 outputs, respectively.

In APEX II devices, an ESB consists of two groups of 8 embedded cells. When implementing memory, each ESB can be configured in any of the following sizes for bidirectional dual-port, dual-port, and single-port modes: 512 × 8; 1,024 × 4; 2,048 × 2; or 4,096 × 1. For dual-port and single-port modes, the ESB can also be configured for 256 × 16. For variable port width RAMs, any port width ratio combination must be 1, 2, 4, 8, or 16. In addition, the ESB in APEX II devices can be split in half and used as two independent 2,048-bit single-port RAM blocks. The two independent RAM blocks must have identical configurations with a maximum width of 256 × 8. For example, each half of the ESB can be used as independent 256 × 8 single-port memory.

In Mercury devices, an ESB consists of two groups of 16 embedded cells. When implementing memory, each ESB can be configured in any of the following sizes for quad port, bidirectional dual-port, dual-port, and single-port modes: 256 × 16; 512 × 8; 1,024 × 4; 2,048 × 2; or 4,096 × 1. For dual-port and single-port modes, the ESB can also be configured for 128 × 32. For variable port width RAMs, any port width ratio combination must be 1, 2, 4, 8, or 16. The ESB in Mercury devices can also be split in half and used as two independent 2,048-bit single-port or dual-port RAM blocks. For example, one half of the ESB can be used as a 128 × 16 memory single-port memory while the other half can be used as a 1,024 × 2 dual-port memory.

In Stratix and Stratix GX devices, the embedded cells are part of the M-RAM, and M4K and M12 memory blocks. In Cyclone devices, the embedded cells are part of the M4K memory blocks. For more details on these memory blocks, see the specific glossary definitions.

Embedded cells have "numbers" of the following format for the following devices:

Device Family

Format for Embedded Cell "Numbers"

Variable and Number Descriptions

ACEX 1K
FLEX 10K®

EC<number>_<EAB name>

EC<number>

The embedded cell number ranging from 1 to 16.

<EAB name>

The row letter of the EAB that contains the embedded cell.

APEX 20K
APEX II
ARM-based Excalibur

EC<number>_1_<MegaLAB name>

EC<number>

The embedded cell number ranging from 1 to 16.

1

The ESB number.

<MegaLAB name>

The row letter and column number of the MegaLAB structure that contains the ESB.

Mercury

EC<number>_<ESB name>

EC<number>

The embedded cell number ranging from 1 to 16.

<ESB name>

The row letter and column number of the ESB that contains the embedded cell.

Cyclone
Stratix
Stratix GX

EC_X<number>_Y<number>_N<number>

EC_X<number>

The column number that contains the M-RAM, or M4K or M12 memory block that contains the embedded cell.

Y<number>

The row number that contains the M-RAM, or M4K or M12 memory block that contains the embedded cell.

N<number>

The embedded cell number ranging from 0 to 10.


Back to Top

- PLDWorld -

 

Created by chm2web html help conversion utility.