A feature of Stratix^™ and Stratix^™ GX devices that efficiently implements multiply, multiply-add, and multiply-accumulate functions. DSP blocks contain input shift registers to implement digital filter applications, including FIR filters and IIR filters, and can implement up to eight 9 × 9 multipliers, four 18 × 18 multipliers, or one 36 × 36 multiplier. The multipliers in the DSP block can optionally feed an adder/subtractor or accumulator within the block.

The DSP block operates in the following modes:

Operation mode	Definition
Simple Multiplier	A single 9-bit, 18-bit, or 36-bit multiplier.
Multiply Accumulator	A single 18-bit multiplier feeding an accumulator.
Two-Multipliers Adder	Two 9-bit or 18-bit multipliers feeding an adder.
Four-Multipliers Adder	For 9-bit or 18-bit multipliers feeding an adder.

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