A logic option that specifies the DQS system clock frequency by which data is transferred between a Stratix^™ device and an external RAM that uses double data rate (DDR). You can specify the desired frequency setting.

This option is ignored if it is applied to anything other than pins intended for use with the dedicated DDR SDRAM interface. This option is available for Cyclone^™, Stratix, and Stratix^™ GX devices.