A logic option that increases the propagation delay from the interior of the device to the clock enable input of an I/O register. This is an advanced option that should be used only after you have compiled a project, checked the I/O timing, and determined that the timing is unsatisfactory. For detailed information on how to use this option, refer to the data sheet for the device family.
You can choose one of the following settings:
| Small | Implements a small increase to the input delay. Creates more propagation delay from the interior of the device to the clock enable input of the I/O register than is allowed by the Large setting. |
| Large | Implements a large increase to the input delay. Creates less propagation delay from the interior of the device to the clock enable input of the I/O register than is allowed by the Compiler's internal default setting. |
| On | Creates the maximum input delay and yields the most propagation delay from the interior of the device to the clock enable input of the I/O register. |
| Off | Creates no extra propagation delay from the interior of the device to the clock enable input of the I/O register. This is the default setting. |
This option is available for APEX™ 20K, APEX 20KC, APEX 20KE, APEX™ II, and ARM®-based Excalibur™ devices.
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