Specifies the ports (pinstubs) of a logic function in VHDL. A component, which consists of the name of a logic function and a list of the function's inputs and outputs, is specified in a Component Declaration and is often stored in a package.

The Quartus^® II software includes a variety of megafunctions and primitives that are supported by VHDL and are automatically installed in the subdirectories of the \quartus\libraries directory. Components for these logic functions are provided in the maxplus2 and megacore packages in the altera library, the altera_mf_components package in the altera_mf library, and the lpm_components package in the lpm library. These libraries are located in subdirectories of the \quartus\libraries\vhdlnn directory, where nn is "87" or "93".

In a VHDL Design File (.vhd), you can use a Component Instantiation Statement to insert an instance of a logic function that is defined as a component in a Component Declaration.

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