An ASCII text file (with the extension .mbus_out) generated by the Simulator when you simulate an ARM^®-based Excalibur^™ design that contains an embedded processor core. This file describes the bus transactions between the embedded processor core and the PLD during simulation, via the Stripe Master-Port.

To generate an uPCore Transaction Model Output File, you must first specify an appropriate uPCore Transaction Model Input File (.mbus_in). You can also optionally create an uPCore Transaction Model Slave Configuration File (.cfg.sbus_in) and corresponding uPCore Transaction Model Slave Input Files (.sbus_in) for use during simulation. The Simulator uses the uPCore Transaction Model Input File data to simulate the interactions between the embedded processor core and the PLD. The resulting uPCore Transaction Model Output File reports the bus transactions (that is, read and write operations) that occur between the embedded processor core and PLD via the Stripe Master-Port during simulation.

If no uPCore Transaction Model Input File exists in the project directory, no information will be written to the uPCore Transaction Model Output File.