architecture

Describes the behavior, data flow, and/or structure of a VHDL design entity. An architecture is created with an Architecture Body. A single entity can have more than one architecture; for example, one architecture can describe the behavior of a design, while a second architecture describes the design structure. Configuration Declarations are used to specify which architectures to use for each entity. However, Altera^® recommends that you have a single architecture for each entity.