Assignments

More Details About Back-Annotating Assignments for a Project



Back-Annotate Assignments is not available if the current file has not yet been compiled, the current file is not part of the current project, or the Quartus® II software is currently compiling a project.

Back-annotation is the process of copying the device, pin, logic cell (including I/O cell and embedded cell), and chip assignments from a compiled project into its Compiler Settings File (.csf), and all routing assignments into its Routing Constraints File (.rcf), if applicable. This process ensures that subsequent compilations produce the same fit.

Because the Quartus II database is overwritten each time the project is compiled, back-annotation can be useful for retaining the current resource and device assignments for future compilations. Changes to the design files, changes to logic synthesis styles, and changes to future releases of the Quartus II software can all alter how the Compiler's Fitter module places the project into one or more devices, and determine whether future compilations will use the same resource assignments.


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