Embedded Memory
		u Dual-Port SRAM and FIFO Capability l 1R/1W 256 x 9 embedded memory blocks: cascadable l Up to 133 MHz synchronous and asynchronous operation u FIFO Control Logic: First with ProASIC l Decoder, control and flag circuitry l Parity generation and detection logic l Access and cycle time 7.5ns u MEMORYmasterTM Tool Automates Memory Generation l Parameters and configuration fully programmable
											9
									256
										256
										256
									256
	Actel ProASIC AE Dec 99
					9