Application Notes

• In-System Programming ProASIC 500K and ProASIC^PLUS Devices with Silicon Sculptor and Flash Pro
• Minimizing Single Event Upset Effects Using Synopsys
• Optimal Datapath Generation Using ACTgen
• Programming Actel Devices
• Using Silicon Explorer for System-level Debug
• Using Synopsys Design Constraints (SDC) with Designer
• Using Synplify to Design in Actel Radiation-Hardened FPGAs

Product Brochures

• Actel Products and Services Brochure
• Actel's Flash Pro Product Brochure
• Designer Software Product Brochure
• Libero IDE Product Brochure
• Actel's Silicon Explorer II Product Brochure
• Silicon Sculptor Quick Reference Card

Software and Hardware Manuals

  Getting Started

• Libero IDE v2.3 Release Notes
• Designer Development System R1-2003 Release Notes
• Designer Installation and Licensing Instructions
• Designer FPGA Development Software Getting Started User's Guide

   Design Entry

• Libero IDE v2.3 User's Guide
• Macro Library Guide
• ProASIC^PLUS Macro Library Guide
• A Guide to ACTgen Macros
• Actel HDL Coding Style Guide

   Design Implementation

• Libero IDE v2.3 User's Guide
• Designer FPGA Development Software R1-2003 User's Guide
• ChipEdit User's Guide
• PinEdit User's Guide
• SmartPower User's Guide

   Design Analysis

• Timer User's Guide
• Netlist Viewer User's Guide

   Synthesis

• Libero IDE v2.3 User's Guide

   Simulation

• Libero IDE v2.3 User's Guide
• ModelSim Bookcase
• VHDL Vital Simulation Guide
• Verilog Simulation Guide
• Mentor Graphics Interface Guide
• WaveFormer Lite User's Guide

   Programming and Debugging

• Flash Pro v2.0 User's Guide
• Silicon Sculptor User's Guide (Windows Environment)
• Silicon Sculptor User's Guide (DOS Environment)
• Silicon Explorer II User's Guide